A. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device.
B. Description of the Related Art
Conventionally, active components and passive components configuring a circuit are disposed on a substrate of a semiconductor device. The active components are transistors and diodes, for example. The passive components are resistors and capacitors, for example. Furthermore, an alignment marker generally is disposed on the substrate of a semiconductor device, separately from such components. The alignment marker is used as a position recognition pattern that is used for automatically performing positioning between a photomask and a wafer when components are produced in a wafer process. In addition, the alignment marker is used as a pattern for automatically recognizing the position of a chip or the coordinates on a chip in a die-bonding process or a wire-bonding process of a semiconductor chip in an assembly process.
As a semiconductor device in which such an alignment marker is disposed, the following device has been proposed. FIG. 11 is a plan view that illustrates the structure of an alignment marker of a conventional semiconductor device. FIG. 12 is a cross-sectional view that illustrates the cross-sectional structure taken along cutting plane line AA-AA′ represented in FIG. 11. FIGS. 11 and 12 are FIGS. 1 and 2 represented in U.S. Pat. No. 4,967,904. By forming a plurality of opening portions 105 in an interlayer insulating film 104 and covering the surface thereof with a metal film 106, the surface of the metal film 106 is formed to be uneven, whereby reflected light is scattered. The size of the opening portion 105 is the size of a level that is the same as that of a contact hole of the component and of a level that is not recognizable for an image recognition apparatus. The size of the metal film 106 is of a level that is recognizable for an image recognition apparatus (for example, see U.S. Pat. No. 4,967,904).
According to U.S. Pat. No. 4,967,904, by actively using light that is scattered by being reflected on the metal film, even when the semiconductor device is tilted or the thickness of a passivation film is uneven, the alignment marker can be recognized with high precision. In addition, since the sizes of the opening portion and the contact hole are small to be unrecognizable for an image recognition apparatus, the alignment marker can be recognized with high precision without using an expensive image recognition apparatus capable of recognizing fine patterns. Accordingly, the cost of the manufacturing process and the product unit price can be easily lowered. In FIGS. 11 and 12, a semiconductor substrate 101, a SiO2 layer 102, a polysilicon film 103, and a passivation film 107 are illustrated.
In recent years, in order to improve the degree of integration or lower the cost, a gate length and a wiring width tend to be micronized in semiconductor devices. As a method of manufacturing a semiconductor device to which a micronizing technology is applied, a method has been proposed in which a reflection prevention film used for preventing light from irregularly reflecting on an aluminum (Al) film at the time of exposing a patterning resist mask of the Al film is formed on the Al film (for example, see U.S. Pat. No. 3,695,106). As another method, a method has been proposed in which a titanium nitride (TiN) film disposed on an alignment mark is removed with the TiN film remaining on a fuse for preventing the reflection of light on the fuse and improving the reading precision of the alignment mark (for example, see Japanese Patent Application Laid-Open (JP-A) No. 2005-012078).
Generally, a TiN film is used as the reflection prevention film and is formed on an Al film that is formed as a metal wiring. In a case where the metal wiring is configured only by the Al film, light is irregularly reflected on the metal wiring at the time of exposing a patterning resist mask of the metal wiring, which is a factor for degrading micronizing the pattern size. Accordingly, in U.S. Pat. No. 3,695,106 and JP-A No. 2005-012078, as an outermost surface layer of the metal film configuring the metal wiring, a TiN film on which it is difficult for light to be reflected is formed, whereby the pattern size is micronized in the exposure process. In addition, the TIN film suppresses the growth of hillocks (fine projections) generated from the Al film when the product is heated or heat-treated in the manufacturing process.
According to U.S. Pat. No. 4,967,904 described above, the recognition precision of the alignment marker is improved by using light that is reflected on the metal film. On the other hand, according to U.S. Pat. No. 3,695,106 and JP-A No. 2005-012078, by arranging the reflection prevention film that prevents light from being reflected on the metal film, for example, the gate length and the wiring width are micronized. Accordingly, in a case where the technology disclosed in U.S. Pat. No. 3,695,106 or JP-A No. 2005-012078 is applied to the technology disclosed in U.S. Pat. No. 4,967,904, the function of the technology disclosed in U.S. Pat. No. 4,967,904 is offset by the function of the technology disclosed in U.S. Pat. No. 3,695,106 or JP-A No. 2005-012078, whereby the advantage of improving the recognition precision of the alignment marker disclosed in U.S. Pat. No. 4,967,904 cannot be acquired (trade-off relation). In other words, in a semiconductor device in which the alignment marker disclosed in U.S. Pat. No. 4,967,904 is disposed, there is a problem in that micronization is difficult to be achieved.
The present invention solves the problems of the conventional technologies described above, and provides a semiconductor device and a method of manufacturing a semiconductor device capable of realizing high position recognition precision and micronization.